AD9653BCPZ-125

AD9653BCPZ-125 is a quad, 16bit, 125MSPS analogue-to-digital converter (ADC) with an on-chip sample-and-hold circuit designed for low cost, low power, small size and ease of use. The product operates at a conversion rate of up to 125MSPS and is optimized for outstanding dynamic performance and low power in applications where small package size is critical. The ADC requires a single 1.8V power supply and LVPECL-/CMOS-/LVDS -compatible sample rate clock for full-performance operation. No external reference or driver components are required for many applications. The ADC automatically multiplies the sample rate clock for the appropriate LVDS serial data rate. A data clock output (DCO) for capturing data on the output and a frame clock output (FCO) for signalling a new output byte is provided. Typical applications include medical ultrasound and MRI, high-speed imaging, quadrature radio receivers, diversity radio receivers and test equipment.

• 1.8V supply operation
• Low power of 164mW per channel at 125MSPS
• 650MHz full power analogue bandwidth
• Full chip and individual channel power-down modes, flexible bit orientation
• Built-in and custom digital test pattern generation, multichip sync and clock divider
• Programmable output clock and data alignment, standby mode
• Differential nonlinearity (DNL) is 0.95LSB max at AVDD = 1.8V, DRVDD = 1.8V, 2Vp-p
• Integral nonlinearity (INL) is 8.18LSB max at AVDD = 1.8V, DRVDD = 1.8V, 2Vp-p
• Temperature range from -40°C to +85°C
• 48-lead frame chip scale package [LFCSP]

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