DC104B-A

DC104B-A demonstration circuit features the low noise LTC1068CG universal low noise 8th order filter building block. It is assembled with input, output and power supply test terminals, a 28-lead SSOP filter device (LTC1068CG Series), a dual op amp in an SO-8 for input or output buffers and decoupling capacitors for the filter and op amps. The filter and dual op amps share the power supply inputs to the board. Jumpers JPA to JPD on the board con-figure the filter’s second order circuit modes, jumper JP1 configures the filter for dual or single supply operation and jumpers JP2 (A-D) to JP3 (A-D) configure the op amp buffers as inverting or non-inverting. The printed circuit layout of DC104 is arranged so that most of the resistor connections for one 8th order filter or two 4th order filters are available on the board. A resistor makes a connection between two filter nodes on the board and for most filter designs, no wiring is required.

• Clock-to-centre frequency ratio of 100, fc to 50kHz