74LVC125APW,118

74LVC125APW,118 is a quad buffer/line driver with 3-state outputs controlled by the output enable inputs (n active-low OE). A HIGH on n active-low OE causes the outputs to assume a high impedance OFF-state. Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of this device as a translator in mixed 3.3V and 5V environments. The Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

• Overvoltage tolerant inputs to 5.5V
• Wide supply voltage range from 1.2V to 3.6V
• CMOS low power consumption, direct interface with TTL levels
• IOFF circuitry provides partial power-down mode operation
• Input leakage current is ±20μA max at VCC = 3.6V; VI = 5.5V or GND
• Supply current is 40μA max at VCC = 3.6V; VI = VCC or GND;IO = 0A
• Output skew time is 1.5ns max at VCC = 3.0V to 3.6V
• TSSOP14 package
• Temperature range from -40°C to +125°C