입고 시 알림 요청
| 수량 | 가격 |
|---|---|
| 1+ | ₩17,722 |
| 10+ | ₩13,895 |
| 25+ | ₩12,942 |
| 50+ | ₩12,074 |
| 100+ | ₩11,205 |
| 250+ | ₩10,990 |
제품 정보
제품 개요
The NB6N11SMNG is a 1:2 AnyLevel™ input to LVDS fan-out Buffer/Translator has a wide input common mode range from GND + 50mV to VCC - 50mV. Combined with the 50Ω internal termination resistors at the inputs, the NB6N11S is ideal for translating a variety of differential or single-ended clock or data signals to 350mV typical LVDS output levels. It is a differential 1:2 clock or data receiver and will accept AnyLevel input signals of LVPECL/CML/LVCMOS/LVTTL/LVDS. These signals will be translated to LVDS and two identical copies of clock or data will be distributed, operating up to 2GHz or 2.5Gb/s respectively. As such, the NB6N11S is ideal for SONET, GigE, fiber channel, backplane and other clock or data distribution applications.
- 1ps Maximum of RMS clock jitter
- Typically 10ps of data dependent jitter
- 380ps Typical propagation delay
- 120ps Typical rise and fall times
- Functionally compatible with existing 3.3V LVEL/LVEP/EP/SG devices
애플리케이션
Industrial, Automation & Process Control, Signal Processing, Clock & Timing
기술 사양
Buffer, Translator
QFN
16Pins
3.6V
-
85°C
-
No SVHC (25-Jun-2025)
-
QFN
3V
-
-40°C
-
-
기술 문서 (1)
NB6N11SMNG의 대체 제품
1개 제품을 찾았습니다.
법률 및 환경
최종후의 중요 제조 공정이 이루어진 국가원산지:Malaysia
최종후의 중요 제조 공정이 이루어진 국가
RoHS
RoHS
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