MC74VHC138DTR2G

The MC74VHC138DTR2G is a 3-to-8 Line Decoder fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. When the device is enabled, three Binary Select inputs (A0 - A2) determine which one of the outputs (Y0\ - Y7\) will go low. When enable input E3 is held low or either E2\ or E1\ is held high, decoding function is inhibited and all outputs go high. E3, E2\ and E1\ inputs are provided to ease cascade connection and for use as an address decoder for memory systems. The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7V, allowing the interface of 5V systems to 3V systems.

• Power down protection provided on inputs
• Balanced propagation delays
• Pin and function compatible with other standard logic families
• Latchup performance exceeds 300mA

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