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| 수량 | 가격 |
|---|---|
| 1+ | ₩54,045 |
| 5+ | ₩52,577 |
| 10+ | ₩51,108 |
| 25+ | ₩49,736 |
제품 정보
제품 개요
8A34012E-000NLG is a port synchronizer for IEEE 1588 frequency and time/phase for equipment that uses packet-based and physical layer-based equipment synchronization. It is a highly integrated device that provides tools to manage timing references, clock sources, and timing paths for IEEE 1588 and Synchronous Ethernet (SyncE) based clocks. The PLL channels can act independently as frequency synthesizers, jitter attenuators, digitally controlled oscillators (DCO) or digital phase lock loops (DPLL). Typical application is core and access IP switches / routers, synchronous Ethernet equipment, telecom boundary clocks (T-BCs) and T-TSCs according to ITU-T G.8273.2, 10Gb, 40Gb, and 100Gb Ethernet interfaces, central office timing source and distribution, wireless infrastructure for 4.5G and 5G network equipment.
- 72-QFN package
- Four independent timing channels, supports 1MHz I²C or 50MHz SPI serial processor ports
- 8 differential / 16 LVCMOS outputs
- Frequencies from 0.5Hz to 1GHz (250MHz for LVCMOS)
- Jitter below 150fs RMS (10kHz to 20MHz), independent output voltages of 3.3V, 2.5V, or 1.8V
- 7 differential / 14 single-ended clock inputs, support frequencies from 1kHz to 1GHz
- DPLLs can be configured as DCOs to synthesize precision time protocol (PTP) / IEEE 1588 clocks
- DPLL phase detectors can be used as time-to-digital converters (TDC) with precision below 1ps
- Temperature range from -40° to +85°C
기술 사양
Frequency Synthesiser
8Outputs
3.465V
72Pins
85°C
-
1GHz
1.71V
QFN-EP
-40°C
-
No SVHC (25-Jun-2025)
법률 및 환경
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