EVLSTGAP3S6S

EVLSTGAP3S6S is a half-bridge evaluation board designed to evaluate the STGAP3S6S isolated single gate driver. The STGAP3S6S is characterized by 6 A current capability, rail-to-rail outputs and optimized UVLO and DESAT protection thresholds for SiC MOSFETS, which makes the device optimal for high-power motor drivers in industrial applications. The gate driver has a single output pin and a driver line for an external Miller CLAMP N-channel MOSFET, which optimizes positive and negative gate spikes suppression during fast commutations in half-bridge topologies. The board is supplied by the 5V VAUX connection, which fed the isolated DC-DC converters for the low-side and high-side driving sections. The gate drivers can be directly supplied by VAUX if a 5V MCU is used, or by the onboard linear regulator if a 3.3V MCU is used. The PWM and reset inputs can be easily controlled through dedicated connectors while diagnostic outputs are connected to an onboard LED.

• Half-bridge configuration
• High-voltage rail up to 520V (limited by the MOSFET’s and capacitor’s rating)
• SCTH60N120G2-7 SiC MOSFETs: 1200V, 52mohm, 60A
• Compatible with 5V and 3.3V MCUs
• VDD logic supplied by onboard-generated 3.3V or VAUX = 5V
• Easy jumper selection of driving voltage configuration: 19/0V; +19/-4.7V; +17/0V; +17/-4.7V
• Fault LED indicators
• Maximum working voltage across isolation: 1200V

경고

The kit is not electrically isolated from the high-voltage supply DC input. No insulation is ensured between the accessible parts and the high voltage.

메모

The evaluation board is designed for demonstration purposes only, and must not be used for electrical installations or machinery.