제품 정보
제품 개요
The NA555DR is a Precision Timing Circuit, capable of producing accurate time delays or oscillation. In the time-delay or mono-stable mode of operation, the timed interval is controlled by a single external resistor and capacitor network. In the a-stable mode of operation, the frequency and duty cycle can be controlled independently with two external resistors and a single external capacitor. The threshold and trigger levels normally are two-thirds and one-third, respectively, of VCC. These levels can be altered by use of the control-voltage terminal. When the trigger input falls below the trigger level, the flip-flop is set and the output goes high. If the trigger input is above the trigger level and the threshold input is above the threshold level, the flip-flop is reset and the output is low. The reset (RESET) input can override all other inputs and can be used to initiate a new timing cycle. When RESET goes low, the flip-flop is reset and the output goes low.
- Timing from microseconds to hours
- Astable or monostable operation
- Adjustable duty cycle
- TTL-compatible output can sink or source up to 200mA
- Green product and no Sb/Br
애플리케이션
Sensing & Instrumentation, Security, Clock & Timing
경고
IC can be damaged by ESD. We recommend that all ICs be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
기술 사양
100kHz
16V
8Pins
105°C
4.5V
SOIC
-40°C
-
기술 문서 (1)
NA555DR의 대체 제품
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법률 및 환경
최종후의 중요 제조 공정이 이루어진 국가원산지:Malaysia
최종후의 중요 제조 공정이 이루어진 국가
RoHS
RoHS
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