제품 정보
제품 개요
The TPS51200DRCR is a 3A sink/source DDR Termination Regulator with VTTREF buffered. It is specifically designed for low input voltage and low-noise systems where space is a key consideration. It maintains a fast transient response and only requires a minimum output capacitance of 20μF. In addition the TPS51200 provides an open-drain PGOOD signal to monitor the output regulation and an EN signal that can be used to discharge VTT during S3 (suspend to RAM) for DDR applications.
- Sink and source termination regulator includes droop compensation
- REFIN input allows for flexible input tracking either directly or through resistor divider
- Remote sensing (VOSNS)
- ±10mA Buffered reference (REFOUT)
- Built-in soft start, UVLO and OCL
- Thermal shutdown
- Meets DDR and DDR2 JEDEC specifications
애플리케이션
Sensing & Instrumentation, Consumer Electronics, Communications & Networking, Computers & Computer Peripherals, Signal Processing, Test & Measurement, Wireless, Imaging, Video & Vision, HVAC, Medical
기술 사양
DDR, DDR2, DDR3, DDR3L, DDR4
-
1.25V
-
1.25V
-
3A
-
-40°C
VSON
-
MSL 2 - 1 year
Fixed
2.375V
3.5V
VSON
10Pins
-
Surface Mount
-
85°C
-
-
No SVHC (27-Jun-2018)
기술 문서 (1)
TPS51200DRCR의 대체 제품
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법률 및 환경
최종후의 중요 제조 공정이 이루어진 국가원산지:United States
최종후의 중요 제조 공정이 이루어진 국가
RoHS
RoHS
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