AD5340BRUZ

AD5340 is a single 12-bit DAC. The device have a parallel interface. CS selects the device and data is loaded into the input registers on the rising edge of WR. The GAIN pin allows the output range to be set at 0V to VREF or 0V to 2 × VREF. Input data to the DAC is double-buffered, allowing simultaneous update of multiple DACs in a system using the LDAC pin. An asynchronous CLR input is also provided, which resets the contents of the input register and the DAC register to all zeros. This device also incorporate a power-on reset circuit that ensures the DAC output powers on to 0V and remains there until valid data is written to the device.

• Low power operation is 115μA at 3V, 140μA at 5V
• Power-down to 80nA at 3V, 200nA at 5V via PD pin
• Operating power supply range is 2.5V to 5.5V
• Double-buffered input logic, power-on reset to 0V
• Low power parallel data interface, slew rate is 0.7V/μs
• Relative accuracy is ±2LSB typ
• Differential nonlinearity is ±0.2LSB typ
• Output voltage settling time is 8μs typ at (¼ scale to ¾ scale change, 0x400 to 0xC00)
• Operating temperature range is –40°C to +105°C
• Packaging style is 24-lead thin shrink small outline package [TSSOP]

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