입고 시 알림 요청
수량 | 가격 |
---|---|
1+ | ₩117,533 |
10+ | ₩103,999 |
25+ | ₩100,253 |
100+ | ₩96,507 |
제품 정보
제품 개요
AD9642-170 is a analogue-to-digital converter (ADC) with sampling speeds of up to 250MSPS. This is designed to support communications applications, where low cost, small size, wide bandwidth, and versatility are desired. The ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. The ADC features wide bandwidth inputs that can support a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. A duty cycle stabilizer (DCS) is provided to compensate for variations in the ADC clock duty cycle, allowing the converter to maintain excellent performance. Typical applications are communications, diversity radio systems, multimode digital receivers (3G), TD-SCDMA, WiMAX, WCDMA, CDMA2000, GSM, EDGE, LTE, I/Q demodulation systems, smart antenna systems, general-purpose software radios, ultrasound equipment, broadband data applications.
- Proprietary differential input maintains excellent SNR performance for input frequency up to 350MHz
- 3-pin, 1.8V SPI port for register programming and readback
- LVDS (ANSI-644 levels) outputs, internal ADC voltage reference
- ADC clock duty cycle stabilizer, serial port control, energy saving power-down modes
- Resolution is 14bit
- Offset error is ±11mV max (AVDD=1.8V, DRVDD=1.8V, VIN=−1.0Dbfs, ADC DC)
- Gain error is +2/−11%FSR (AVDD=1.8V, DRVDD=1.8V, VIN=−1.0Dbfs, ADC DC)
- 32-lead frame chip scale package [LFCSP-WQ]
- Temperature rating range from −40°C to +85°C
메모
ADI products are only authorized (and sold) for use by the customer and are not to be resold or otherwise passed on to any third party
기술 사양
14bit
Differential, Single Ended
Single
1.9V
32Pins
85°C
-
No SVHC (21-Jan-2025)
170MSPS
3 Wire, Serial, SPI
1.7V
LFCSP
-40°C
Single 14-bit Pipeline ADCs
MSL 3 - 168 hours
법률 및 환경
최종후의 중요 제조 공정이 이루어진 국가원산지:Philippines
최종후의 중요 제조 공정이 이루어진 국가
RoHS
RoHS
제품 준수 증명서