AD9643BCPZ-250

AD9643 is a dual, 14bit ADC with sampling speeds of up to 250MSPS. The AD9643 is designed to support communications applications, where low cost, small size, wide bandwidth and versatility are desired. The dual ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. A duty cycle stabilizer is provided to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance. Typical application includes communications, diversity radio systems, multimode digital receivers 3G (TD-SCDMA, WiMax, WCDMA, CDMA2000, GSM, EDGE, LTE), I/Q demodulation systems, smart antenna systems, general-purpose software radios, ultrasound equipment and broadband data applications.

• SNR of 70.6dBFS at 185MHz AIN and 250MSPS and SFDR of 85dBc at 185MHz AIN and 250MSPS
• (-)151.6dBFS/Hz input noise at 185MHz, -1dBFS AIN and 250MSPS
• Total power consumption of 785mW at 250MSPS
• 1.8V supply voltage and LVDS (ANSI-644 levels) outputs
• Integer 1-to-8 input clock divider (625MHz maximum input), sample rates of up to 250MSPS
• IF sampling frequencies of up to 400MHz, internal ADC voltage reference and serial port control
• ADC clock duty cycle stabilizer, 95dB channel isolation/crosstalk and energy saving power-down modes
• Flexible analogue input range of 1.4Vp-p to 2.0Vp-p (1.75Vp-p nominal)
• 64 lead LFCSP-VQ-EP package
• Operating temperature range from -40°C to 85°C

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