AD9656BCPZ-125

AD9656 is a 125MSPS analogue-to-digital converter (ADC) with an on-chip sample and hold circuit designed for low cost, low power, small size, and ease of use. The device operates at a conversion rate of up to 125MSPS and is optimized for outstanding dynamic performance and low power in applications where small package size is critical. The ADC requires a single 1.8V power supply and LVPECL-/CMOS-/LVDS-compatible sample rate clock for full-performance operation. An external reference or driver components are not required for many applications. Individual channel power-down is supported and typically consumes less than 14mW when all channels are disabled. The ADC contains several features designed to maximize flexibility and minimize system cost, such as a programmable output clock, data alignment, and digital test pattern generation. Application includes medical ultrasound and MRI, high speed imaging, quadrature radio receivers diversity radio receivers, portable test equipment.

• Signal-to-noise ratio (SNR) is 80.1dBFS (fIN=9.7MHz, 25°C, AVDD=1.8V)
• Spurious-free dynamic range (SFDR) is 89dBc (fIN=9.7MHz, AVDD=1.8V)
• JESD204B subclass 1 coded serial digital outputs, flexible analogue input range of 2.0V to 2.8V p-p
• Low power is 197mW per channel at 125MSPS (two lanes)
• Typical differential nonlinearity is ±0.6LSB (AVDD=1.8V), multichip sync and clock divider
• Typical integral nonlinearity (INL) is ±4.5LSB (AVDD=1.8V), standby mode
• Typical analogue input bandwidth, full power is 650MHz (temperature is 25°C)
• Serial port control, full chip and individual channel power-down modes
• Built-in and custom digital test pattern generation
• 56-lead frame chip scale package [LFCSP-WQ], temperature rating range from -40 to +85°C

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ADI products are only authorized (and sold) for use by the customer and are not to be resold or otherwise passed on to any third party