ADCLK950BCPZ

ADCLK950 is an ultrafast clock fan-out buffer fabricated on the Analog Devices, Inc, proprietary XFCB3 silicon germanium (SiGe) bipolar process. This device is designed for high speed applications requiring low jitter. This device has two selectable differential inputs via the IN-SEL control pin. Both inputs are equipped with centre tapped, differential, 100 ohm on-chip termination resistors. The inputs accept dc-coupled LVPECL, CML, 3.3V CMOS (single-ended), and ac-coupled 1.8V CMOS, LVDS, and LVPECL inputs. A VREFx pin is available for biasing ac-coupled inputs. It features 10 full-swing emitter coupled logic (ECL) output drivers. For LVPECL (positive ECL) operation, bias VCC to the positive supply and VEE to ground. It is used in application such as low jitter clock distribution, clock and data signal restoration, level translation, wireless communications, wired communications, medical and industrial imaging, ATE and high performance instrumentation etc.

• 2 selectable differential inputs
• Operating frequency is 4.8GHz typical
• Broadband random jitter is 75fs rms typical
• On-chip input terminations
• Input bias current is 20µA typical
• Propagation delay is 210ps typical at (VICM = 2V, VID = 1.6V p-p)
• Supply voltage range is 2.97V to 3.63V
• Power supply rejection is <lt/>3ps/V typical at (VCC − VEE = 3.3V ± 10%)
• Operating temperature is -40°C to +85°C
• Package style is 40-lead LFCSP

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