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수량 | 가격 |
---|---|
1+ | ₩14,497 |
10+ | ₩12,685 |
25+ | ₩10,510 |
50+ | ₩9,423 |
100+ | ₩8,698 |
250+ | ₩8,118 |
500+ | ₩7,696 |
제품 정보
제품 개요
The SN65LVDM050D is a differential Line Driver and Receiver uses low-voltage differential signaling (LVDS) to achieve high signaling rates. This circuit is similar to TIA/EIA-644 standard compliant devices (SN65LVDS) counterparts, except that the output current of the drivers is doubled. This modification provides a minimum differential output voltage magnitude of 247mV across a 50Ω load simulating two transmission lines in parallel. This allows having data buses with more than one driver or with two line termination resistors. The receiver detects a voltage difference of 50mV with up to 1V of ground potential difference between a transmitter and receiver. The intended application of this device and signaling technique is point-to-point half duplex, baseband data transmission over a controlled impedance media of approximately 100Ω characteristic impedance. The transmission media may be printed-circuit board traces, backplanes or cables.
- Typical full-duplex signalling rate of 100Mbps
- Bus-terminal ESD exceeds 12kV
- Low-voltage differential signaling with typical output voltage of 340mV with a 50Ω load
- Valid output with as little as 50mV input voltage difference
- Propagation delay time - 1.7ns Typical driver and 3.7ns typical receiver
- Power dissipation at 200MHz - 50mW Typical driver and 60mW typical receiver
- LVTTL input levels are 5V tolerant
- Driver is high-impedance when disabled or with VCC <lt/>1.5V
- Receiver has open-circuit failsafe design
- Green product and no Sb/Br
애플리케이션
Signal Processing, Industrial
기술 사양
LVDS Transceiver
85°C
3.6V
16Pins
LVDM, LVDS, LVTTL
-
MSL 1 - Unlimited
-40°C
3V
SOIC
LVDM, LVDS, LVTTL
2bit
-
No SVHC (27-Jun-2018)
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