입고 시 알림 요청
수량 | 가격 |
---|---|
1+ | ₩2,396 |
10+ | ₩2,363 |
25+ | ₩2,330 |
50+ | ₩2,296 |
100+ | ₩2,263 |
250+ | ₩2,229 |
500+ | ₩2,196 |
1000+ | ₩2,162 |
제품 정보
제품 개요
The SN74LV4046APW is a high-speed silicon-gate CMOS PLL with VCO that is pin compatible with the CD4046B and the CD74HC4046. The device is specified in compliance with JEDEC Std 7. The SN74LV4046A is a phase-locked loop (PLL) circuit that contains a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator. The signal input can be directly coupled to large voltage signals or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the SN74LV4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear operational amplifier techniques. Various applications include telecommunications, digital phase-locked loop and signal generators.
- Excellent VCO frequency linearity
- VCO-inhibit control for ON/OFF keying and for low standby power consumption
애플리케이션
Communications & Networking, Power Management, Signal Processing
기술 사양
38MHz
16Pins
3V
-40°C
-
VCO
TSSOP
5.5V
125°C
법률 및 환경
최종후의 중요 제조 공정이 이루어진 국가원산지:Malaysia
최종후의 중요 제조 공정이 이루어진 국가
RoHS
RoHS
제품 준수 증명서