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수량 | 가격 |
---|---|
1+ | ₩4,168 |
10+ | ₩3,892 |
25+ | ₩3,703 |
50+ | ₩3,551 |
100+ | ₩3,398 |
250+ | ₩3,348 |
500+ | ₩3,297 |
1000+ | ₩3,239 |
제품 정보
제품 개요
AS4C4M16SA-6TIN 64Mb SDRAM is a high-speed CMOS synchronous DRAM containing 64Mbits. It is internally configured as 4 Banks of 1M word x 16 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Read and write accesses to SDRAM are burst-oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a bank activate command which is then followed by a read or write command. An auto precharge function may be enabled to provide a self-timed row precharge that is initiated at the end of the burst sequence. The refresh functions, either auto or self refresh are easy to use. By having a programmable mode register, the system can choose most suitable modes to maximize its performance. It is well suited for applications requiring high memory bandwidth and particularly well suited to high-performance PC applications.
- Fully synchronous operation, internal pipelined architecture
- 1M word x 16-bit x 4-bank, programmable mode registers, CAS latency: 2 or 3
- Burst length: 1, 2, 4, 8, or full page, burst type: sequential or interleaved, burst stop function
- Auto refresh and self refresh, 4096 refresh cycles/64ms, LVTTL interface
- CKE power down mode, single +3.3V ± 0.3V power supply
- 166MHz frequency
- 54-pin TSOPII package
- Industrial temperature range from -40 to 85°C
기술 사양
SDRAM
4M x 16bit
TSOP-II
3.3V
-40°C
-
64Mbit
166MHz
54Pins
Surface Mount
85°C
No SVHC (27-Jun-2024)
기술 문서 (1)
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