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수량 | 가격 |
---|---|
1+ | ₩3,390 |
10+ | ₩3,193 |
25+ | ₩3,174 |
50+ | ₩3,154 |
100+ | ₩3,134 |
250+ | ₩3,115 |
500+ | ₩3,112 |
제품 정보
제품 개요
CY62128ELL-45ZXIT is a high-performance CMOS static RAM organized as 128K words by 8 bits. This device features an advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life™ (MoBL) in portable applications. The device also has an automatic power-down feature that significantly reduces power consumption when addresses are not toggling. Placing the device into standby mode reduces power consumption by more than 99 percent when deselected (active-low CE1 HIGH or CE2 LOW). The eight input and output pins (I/O0 through I/O7) are placed in a high impedance state when the device is deselected (active-low CE1 HIGH or CE2 LOW), the outputs are disabled (OE HIGH), or a write operation is in progress (active-low CE1 LOW and CE2 HIGH and active-low WE LOW). The CY62128E device is suitable for interfacing with processors that have TTL I/P levels.
- Voltage range from 4.5V to 5.5V, automatic power down when deselected
- Complementary metal oxide semiconductor (CMOS) for optimum speed and power
- Easy memory expansion with active-low CE1, CE2, and active-low OE features
- MoBL SRAM family, 1-Mbit density, × 8 bus width, 90nm process technology
- 45ns speed, input leakage current is +1µA maximum at (GND < VI< VCC)
- Output leakage current is +1µA maximum at (GND < VO < VCC, output disabled)
- VCC operating supply current is 11mA typical at (f = fmax = 1/tRC)
- Input capacitance is 10pF maximum at (TA = 25°C, f = 1MHz, VCC = VCC)
- 1µA typ automatic CE power-down current—CMOS inputs at (active-low CE1 > VCC – 0.2V or CE2 < 0.2V)
- Industrial temperature range from 32-pin TSOP package
기술 사양
Asynchronous SRAM
128K x 8bit
32Pins
5.5V
-
-40°C
-
No SVHC (21-Jan-2025)
1Mbit
TSOP-I
4.5V
5V
Surface Mount
85°C
MSL 3 - 168 hours
기술 문서 (1)
법률 및 환경
최종후의 중요 제조 공정이 이루어진 국가원산지:Philippines
최종후의 중요 제조 공정이 이루어진 국가
RoHS
RoHS
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