74LVC1G08W5-7

The 74LVC1G08W5-7 is a single 2-input positive AND Gate with a standard push-pull output. The device is designed for operation with a power supply range of 1.65 to 5.5V. The inputs are tolerant to 5.5V allowing this device to be used in a mixed voltage environment. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output preventing damaging current backflow when the device is powered down. The gate performs the positive Boolean function Y = A • B or Y = (A\ + B\)\.

• ±24mA Output drive at 3.3V
• CMOS low power consumption
• IOFF Supports partial-power-down mode operation
• Inputs accept up to 5.5V
• ESD protection tested per JESD 22
• Latch-up exceeds 100mA per JESD 78, Class I
• Direct interface with TTL levels
• Green product and no Sb/Br

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