제품 정보
제품 개요
74LVC125AD,118 is a quad buffer/line driver with 3-state outputs controlled by the output enable inputs active low (nOE). A HIGH on (active low)nOE causes the outputs to assume a high impedance OFF-state. Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of this device as translators in mixed 3.3V and 5V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
- Overvoltage tolerant inputs to 5.5V
- Wide supply voltage range from 1.2V to 3.6V
- CMOS low power consumption
- Direct interface with TTL levels
- Complies with JESD8-7A (1.65 to 1.95V), JESD8-5A (2.3 to 2.7V), JESD8-C/JESD36 (2.7 to 3.6V)
- IOFF circuitry provides partial power-down mode operation
- ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000V
- CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000V
- Operating temperature range from -40°C to +125°C
- 14 pin SO package
기술 사양
Buffer / Line Driver, Non Inverting
SOIC
14Pins
4 Element
3.6V
74125
125°C
-
No SVHC (21-Jan-2025)
74LVC125A
SOIC
1 Input
1.2V
74LVC
-40°C
-
-
기술 문서 (1)
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