제품 정보
제품 개요
74LVC1G08GW-Q100,1 is a single 2-input AND gate. Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in mixed 3.3V and 5V applications. Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall time. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (grade 1) and is suitable for use in automotive applications.
- Wide supply voltage range from 1.65V to 5.5V
- High noise immunity, ±24mA output drive (VCC = 3.0V)
- CMOS low power dissipation, direct interface with TTL levels
- Overvoltage tolerant inputs to 5.5V, latch-up performance ≤ 250mA
- IOFF circuitry provides partial power-down mode operation
- Input transition rise and fall rate is 20ns/V max at VCC = 1.65V to 2.7V
- Propagation delay is 10.5ns max at -40°C to +125°C, VCC = 1.65V to 1.95V
- Total power dissipation is 250mW maximum at Tamb = -40°C to +125°C
- TSSOP5 package
- Temperature range from -40°C to +125°C
기술 사양
AND Gate
2Inputs
TSSOP
74LVC1G08
1.65V
Without Schmitt Trigger Input
-40°C
AEC-Q100
No SVHC (21-Jan-2025)
Single
5Pins
TSSOP
74LVC
5.5V
50mA
125°C
MSL 1 - Unlimited
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법률 및 환경
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최종후의 중요 제조 공정이 이루어진 국가
RoHS
RoHS
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